Skills
SIM ENGINEER RTL GATE Digital Signal Processing DIGITAL Analog Digital Circuits RF VERA MODELSIM ATE TESTING APPLICATION TESTING DebussyRequirement
Req Name:
;PTE-SIM Engineer
Job Type:
Permanent
No Of Positions:
1
Location:
;Chennai
Experience:
;4 – 6 yrs.
Notice Period:
;<1 month
JOB Description:
Be a member of team that plays a significant role in ensuring the quality of next generation processors for Smart phones and Smart card through Analog and Mix signal.
Minimum Qualifications:
Primary responsibilities include, Analog and Mix signal block connectivity verification at RTL and gate level.
Integrate analog models with RTL and GATE simulation environment.
Define test strategy for Analog blocks - create test plan, define test concurrencies.
Responsible for test pattern generation based on timing simulation, release for ATE and Post silicon debug.
Support silicon characterization and bench level testing by working with design, verification, bench and test teams. Responsible for system level verification for complex SOC which has digital, analog and RF components.
Preferred Qualifications:
Minimum of 4 - 6 years' experience in RTL/GATE level verification concepts of digital and analog blocks Experience on AMS top level verification and basic Understanding of Analog blocks; post-silicon debug of analog blocks is desirable. Expertise in verifying complex designs from system as well as block level, through design flow. Experience in VERA, MODELSIM, Debussy, C Knowledge on Perl or any other scripting language Exposure to post C/Bench/application testing Ability to work in an international team, dynamic environment with good communication skills
Ability to learn and adapt to new tools, methodologies.
Ability to do multi-tasking & work on several high priority designs in parallel.
Soft Skills:
;Good communications & email writing skills.
Education:
BE/B.Tech, ME/M.Tech, MCA