DFT/ATPG/BIST Engineer job - Chennai,Tamil Nadu,India - Mobiveil India Technologies Private Limited

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Full Time

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Chennai,Tamil Nadu,India

Skills

Bist Atpg DFT Design Scanning Testing Tools

Experience: 4 to 6 Years
Industry: IT - Software Services
Functional Area: R&D / Engineering Design

Requirements:

Interface with design team to ensure DFT design rules and guidelines are met.
Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF), Path Delay fault (PDF) models through the use of on-chip test compression techniques.
MBIST verification (including repair), test pattern generation through Mentor tool.
IDDQ constraint validation and pattern generation along with IVA analysis.
ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations.
Work with the Product/Test engineering teams on the delivery of manufacturing test patterns for ATE
Responsible for supporting post Si debug effort, issue resolution
Responsible for Diagnostic Tool generation for ATPG and MBIST and bring-up on ATE.
Developing, enhancing and maintaining scripts as necessary
Experience in ASIC/DFT - simulation, Silicon validation
Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement
In depth knowledge and hands on experience in ATPG - coverage analysis, Transition delay test coverage analysis.
In depth knowledge of Memory verification, repair and failure root-cause analysis.
Experience with any of these tools is required
- ATPG - Tetramax, TestKompress
- MBIST - Mentor ETVerify
- Simulation - VCS (preferred), modelsim
Expertise in test mode timing constraints definition, Hands on experience with prime time is an added advantage
Expertise in scripting languages such as Perl, shell, etc. is an added advantage
Ability to work in an international team, dynamic environment with good communication skills
Ability to learn and adapt to new tools, methodologies.
Ability to do multi-tasking & work on several high priority designs in parallel.