Not Specified
Full Time
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Skills
VHDL FPGA RTL Design Design Verification DO254 DO - 254 DO 254- Experience
- 4 to 5 Years
- Industry
- IT - Software Services
- Functional Area
- R&D / Engineering Design
Requirements:
- 4+ years of experience in behavioral modelling and functional verification.
- Experience in system level modelling and performance analysis using System C
- Experience in developing verification environment using System-Verilog, OVM or UVM
- Expertise in behavioral modelling of the functional blocks using System C or System-Verilog
- Knowledge of AXI/AHB AMBA bus based complex multi-master & slave system
- Company
- Mobiveil India Technologies Private Limited
- Location
- Mobiveil India Technologies Private Limited
Chennai - Website
- http://www.mobiveil.com
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